发明名称 INTEGRATED CIRCUIT AND RECEPTION OF DATA
摘要 PURPOSE: To speedily execute the sum of the calculation of products and the product of the calculation of the sums by connecting the output of a multiplier to one input of an adder and connecting the output of the adder to one input of the multiplier. CONSTITUTION: The integrated circuit processing data has the multiplier 48 and the adder 54, which operate so that calculation can simultaneously be executed. A data channel circuit for connecting the output of the multiplier 48 to the input of the adder 54, and connecting the output of the adder 54 to the input of the multiplier 48 is provided. Thus, the calculation of the sum of the products and the calculation of the product of the sums can speedily be executed. A floating point processor 10 controls a system control code and therefore data can be received at high speed from various bus structures.
申请公布号 JPH025179(A) 申请公布日期 1990.01.10
申请号 JP19890019384 申请日期 1989.01.27
申请人 TEXAS INSTR INC <TI> 发明人 MAIKURU SHII GIRU;HENRII EMU DAARII;EJISON EICHI CHIU;JIEFUREI EI NIIHAUSU
分类号 G06F7/00;G06F7/544;G06F7/57;G06F17/10 主分类号 G06F7/00
代理机构 代理人
主权项
地址