Method of manufacturing field effect transistors and lateral bipolar transistors on the same substrate

摘要

The invention provides a method for manufacturing integrated circuits. For forming circuits incorporating bipolar transistors by CMOS technology for a low cost price, a succession of steps are carried out using only 9 successive masks so as to obtain more particularly a lateral NPN bipolar transistor in a P caisson on an N substrate. The source and drain contacts are made from metal silicide, as well as the base contact. The emitter and collector contacts are made from polycrystalline silicon covered with silicide. The N transistor is self aligned with a low access resistance and a low junction depth. The ionic source and drain implantation of the TMOSP on the one hand and of the bipolar base on the other is common. In addition, the access resistance to the P type transistor and gate covering over the sources and drains of this transistor are minimized while leaving a great latitude of choice for doping of the base of the bipolar transistor.