摘要 |
The invention concerns an LRU circuit, which specifies a replaceable value, which is used to store data which is newly loaded, e.g. from a cache memory. The LRU circuit includes a memory device for previously used information, which relates to the top priority value or the bottom value of a large number of values, and an LRU specifying circuit, to specify which of the top priority value or the bottom value agrees with information which is stored in the memory device for previously used information, so that high speed processing is possible by means of a simplified logical structure. The circuit is also provided with a control device, which directly or indirectly selects the previously specified exchangeable value, if the specifying device cannot specify the exchangeable top priority value correctly, so that even if the exchangeable top priority value cannot be specified correctly, the previously specified exchangeable value is directly or indirectly selected, so that it is possible to reliably prevent the cache memory from interrupting its operation. <IMAGE>
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申请人 |
MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP |
发明人 |
HATA, MASAYUKI;YAMADA, AKIRA, ITAMI, HYOGO, JP |