发明名称 |
Semiconductor device having memory with ECL gate array. |
摘要 |
<p>A semiconductor device in a single chip comprises a memory (20) having a plurality of memory cells, and an emitter coupled logic gate array (21) for carrying out a predetermined logic operation on a data output from one of the memory cells of the memory and for outputting an output signal having a first amplitude. The memory includes a circuit (251-254) for outputting as the data output a positive phase signal (+DO) and a negative phase signal (-DO) respectively having a second amplitude smaller than the first amplitude.</p> |
申请公布号 |
EP0347333(A2) |
申请公布日期 |
1989.12.20 |
申请号 |
EP19890401716 |
申请日期 |
1989.06.16 |
申请人 |
FUJITSU LIMITED;FUJITSU VLSI LIMITED |
发明人 |
KIMOTO, MASAYOSHI;KOHNO, KAZUYUKI |
分类号 |
G11C11/41;G11C11/416;H03K19/086 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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