发明名称 DEFECT DETECTION CIRCUIT FOR READ ONLY MEMORY
摘要 <p>PURPOSE:To detect failure of finished semiconductor chips, by connecting the anode of the 1st diode to each of word lines, the 1st common line to the cathode, the cathode of the 2nd diode to each bit line and the 2nd common line to the anode. CONSTITUTION:The anode of the 1st diode 42 is connected to word lines BL1, BL2 and the cathode is connected to the 1st common line 43. The cathode of the 2nd diode 44 is connected to the bit lines BL1, 2- and the 2nd common line 45 is connected to the anode. Thus, the word lines WL1, 2- and the bit lines BL1, 2 are separated with the diodes 42, 44. Each common line is connected to pads 46, 47. At the initial state when a semiconductor chip is finished, a voltage is applied so as the common line 45 is higher than the common line 43 to check the voltage current characteristics at the same time for all storage cells, allowing to detect the presence/absence of defective cells.</p>
申请公布号 JPS58139397(A) 申请公布日期 1983.08.18
申请号 JP19820020108 申请日期 1982.02.10
申请人 TOKYO SHIBAURA DENKI KK 发明人 SAITOU SHINJI;MIYAMOTO JIYUNICHI
分类号 G11C17/06;G11C17/14;G11C29/00;G11C29/04 主分类号 G11C17/06
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