| 摘要 |
PURPOSE:To obtain a stable clock correction circuit with simple hardware constitution and no adjustment by devising the circuit such that an output clock is not easily affected by momentary fluctuation of an input clock. CONSTITUTION:A momentary fluctuation of an input clock generated between times t0 and t1 is not sent up to an output by inhibiting the acceptance of a level change in the input clock between the point of time t0 when an output level is once changed and a predetermined time tau1 below 1/2 period. Then the level is forcibly inverted after a predetermined time tau2 below a period T and over 1/2 period from the time t0 to recover a missing 'H' or 'T' level due to the forced level inversion after the time tau2 even if the 'H' level or the 'L' level of the input clock is missing at a period T. Thus, system malfunction due to the momentary fluctuation of the input clock is prevented. Thus, the system is built up stably with less hardware and no adjustment. |
