摘要 |
PURPOSE:To attain high circuit integration with comparatively simple circuit constitution, by giving an output of a repetitive waveform generator to plural inverters and outputting a polyphase clock from the inverters via a T type FF and an exclusive OR circuit. CONSTITUTION:A repetitive waveform outputted from a repetitive generator is inputted to different inverter groups INV1-INVn, and a signal is inputted to (n-1) sets of exclusive OR circuit groups EX12-EXn-1n from two adjacent inverters (n-1) sets of input threshold voltage. The inverter INV1 having the minimum input threshold voltage gives a signal to a clock input terminal CK3 of a TFF3 and the signal is inputted to a reset terminal of the TFF3 via an OR circuit 4 having the inverter INVn and an external input terminal 4R from the inverter INn having the highest input threshold value, and a signal is inputted to (n-1) sets of logical circuit groups G12-Gn-1n from an output terminal 3Q to output a polyphase clock. |