发明名称 METHOD OF SAMPLING TRANSISTOR SIZE FROM MASK PATTERN
摘要 PURPOSE:To sample the sizes of all the transistors besides the connection information between the transistors at a high speed by one scanning of the mask pattern of an LSI by a slit method, by finding the width and the length of a channel from the coordinate values of the opposite apices in a channel region. CONSTITUTION:Out of processing regions R1 to R5 surrounded by the segments along the longitudinal axis of slits S1 to S3 and each side of a plurality of the layers of the mask pattern of an integrated circuit, the area of the whole processing region R3 in which said layers overlapping constitute the channel region of a transistor is calculated. The opposite apices C1 and C3 of said channel region are made to be an initiation point and a termination point respectively and the coordinate values of said initiation and termination points are set based on rectangular coordinate axes. If the area of the channel region calculated from the coordinate values of the initiation and termination points on the assumption that the channel region is rectangular is equal to that calculated beforehand, the channel width and the channel length of said channel region are found from said initiation and termination points.
申请公布号 JPH01293530(A) 申请公布日期 1989.11.27
申请号 JP19880124114 申请日期 1988.05.20
申请人 FUJITSU LTD 发明人 OE RYOICHI
分类号 H01L21/66;G06F17/50;H01L21/027;H01L21/30 主分类号 H01L21/66
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