发明名称 HIGH WITHSTAND VOLTAGE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain a high withstand voltage device which is stable even in a state of high temperature reverse bias by a method wherein the relation between dA and dB is specified by providing a recess of depth dA in the exposed part of the substrate surface of a P-N junction of depth dB, and then it is filled with a glass material. CONSTITUTION:A P layer 2 of depth dB approx. 10-60mum is provided on the N type Si substrate 1 with specific resistance approx. 30-120OMEGAcm, and the impurity density of the surface is set at approx. 1X10<17>-2X10<19>atom/cm<3>. The ring shaped groove 5 of fixed depth dA is provided in the exposed part on the substrate surface of the P-N junction 3, and filled with the glass material 4. Then, the relation between dA and dB is set at 0.4dB<=dA<0.6dB. By this constitution, even when the P-N junction is reversely biased, a stable characteristic can be obtained, and accordingly a planer type device of high withstand voltage can be obtaind. It is advantageous to apply it for a diode, a transistor, an SCR, etc.
申请公布号 JPS58151068(A) 申请公布日期 1983.09.08
申请号 JP19820031740 申请日期 1982.03.02
申请人 TOKYO SHIBAURA DENKI KK 发明人 HIDESHIMA MAKOTO;SAKURAI KIYOSHI
分类号 H01L29/861;(IPC1-7):01L29/91 主分类号 H01L29/861
代理机构 代理人
主权项
地址