| 摘要 |
PURPOSE:To omit it to add a high-impurity concentration well layer to the center of a base layer to reduce the cost of the title MOSFET and to prevent the generation of a latch-up by a method wherein a metal which causes a sintering phenomenon with silicon is used for an emitter-source electrode and, moreover, the distance between the edge part of the contact surface of the electrode with a source layer and the edge part of a gate is limited to a specified distance or shorter. CONSTITUTION:A source layer 6 is formed on the whole region other than a channel forming region in the surface layer of a p-type base layer 4 of a second conductivity type and an emitter source electrode 9 consisting or a metal which causes a sintering phenomenon with silicon is provided in such a way as to come into contact to the layer 6 through an insulating layer of a width of 4mum or narrower between the edge parts of a gate 8. When pure Al or Ti and so on are used for the metal constituting the electrode, a phenomenon called sintering or spearing is generated and the metal penetrates the source layer and brings the base layer under the source layer into a low-resistance state. By inhibiting the distance (r) between the source layer and the end part of the gate 8 within the electrode 9 to 4mum or shorter, the base short- circuit resistance of a parasitic transistor is decreased and the process of forming a high-impurity concentration well layer can be omitted. |
