摘要 |
PURPOSE:To obtain a regenerated output with less jitter even if an input signal containing much jitter is inputted by inhibiting if a value that phase difference between an output signal and an input signal is integrated while the input signal is inputted M times is a leading phase, and not inhibiting if said value is a lagging phase. CONSTITUTION:The phase difference between the input signal and the output signal is integrated by an up-down counter 1 while the input signal is inputted M times, and if an integrated result output signal is leading, a 1, 0 signal generating part 11 outputs 1-level, and if lagging, it outputs 0-level, and a signal to be inputted to a rising differentiation circuit 9 is changed from the input signal so that the signal that the output signal is M-frequency divided by an M-frequency divider 2 is inputted, and the up-down counter 1 is cleared by the output of the differentiation circuit 9. Accordingly, the jitter comes to be the mean value during a period the input signal is inputted M times, and since phase control is performed one time when the input signal is inputted M times, the regenerated output with less jitter can be obtained even if much jitter is contained in the input signal. |