| 摘要 |
<p>A BIC memory cell device comprises a first insulating layer (25) covering a MOS structure (T1), a first penetrating opening (26) in the first insulating layer in correspondence to a drain region (22) and defined by an inclined first side wall (26c) which defines the diameter of the first opening such that the diameter increases towards a top surface of the first insulating layer, a second penetrating opening (28) in the first insulating layer in correspondence to a source region (21) and defined by a second side wall (28a) having a straight vertical cross section, a third penetrating opening (29) in the first insulating layer in correspondence to a gate electrode (23) and defined by a third side wall (29a) having a straight vertical cross section, a second insulating layer (27) provided on the first insulating layer in correspondence to the drain region, a first wiring electrode (31) deposited such that the second insulating layer is sandwiched between the first wiring electrode and the drain region, and second and third wiring electrodes (32, 33) contacting with the source region and the gate electrode.</p> |
