发明名称 CHANNEL SIMULATION SYSTEM
摘要 PURPOSE:To shorten a debugging time by preparing various data for a program test, and providing a circuit which interprets and executing instructions for writing, reading, etc., and also simulates a channel device and taking the program test. CONSTITUTION:A test data interpreter 15 processes data stored on a floppy disk 14, i.e. macroinstructions for writing, reading, etc., contained in a processing program and various data sent from a channel device and a terminal device connected thereto. Thoase data which are previously programmed are interpreted and executed by the test data interpreter 15. A simulation channel part 16 consists of a transmitting register part 161 and a receiving register 162 and simulates the channel device to take a test of a program for controlling the channel device.
申请公布号 JPS58169221(A) 申请公布日期 1983.10.05
申请号 JP19820052067 申请日期 1982.03.30
申请人 FUJITSU KK 发明人 SASAKI SHINJI
分类号 G06F11/22;G06F11/36;G06F13/00 主分类号 G06F11/22
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