发明名称 Integrated matrix display circuitry
摘要 Integrated latch circuitry for driving row or column busses of a matrix device fabricated in low mobility semiconductor material includes cross coupled transistors having variable impedance load devices. The cross coupled transistors are coupled between relatively positive and relatively negative supply potentials. The relatively negative supply potential is modulated to preset the state of the latches in order to reduce the load on input circuitry applying data to the latch. The variable impedance loads are modulated between relatively high and relatively low impedances to enhance the speed at which the latches change state.
申请公布号 US4872002(A) 申请公布日期 1989.10.03
申请号 US19880150817 申请日期 1988.02.01
申请人 GENERAL ELECTRIC COMPANY 发明人 STEWART, ROGER G.;PLUS, DORA
分类号 G09G3/20;G09G3/36 主分类号 G09G3/20
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