发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To obtain a circuit having no malfunction and its rational pattern lay out by applying a prescribed voltage to a connecting node when first and second transistors are turned off and applying a signal or the voltage of a power source to an internal circuit when they are turned on. CONSTITUTION:The external input terminal or the inverse of OE/VPP terminal of a signal line and power source has the transistor T1 connected to a drain to connect the drain of the transistor T2 having a source connected to the internal circuit in an integrated circuit main body to the source of the transistor T1. Then, when the transistors T1, T2 are turned off, a transistor T3 for applying 'VCC-VTH' to the connecting node N2 of these transistors is disposed, and when the transistors T1, T2 are turned on, a program power source VPP is applied to the internal circuit. Thereby, even when an inconvenient voltage is applied to the external terminal of the signal line and power source, the rational pattern layout without the malfunction is obtained.</p>
申请公布号 JPH01245494(A) 申请公布日期 1989.09.29
申请号 JP19880072738 申请日期 1988.03.26
申请人 TOSHIBA CORP;TOSBAC COMPUTER SYST CO LTD 发明人 FUJIMOTO TOSHIYUKI;IWAHASHI HIROSHI;NAKAI HIROTO
分类号 G11C17/00;G11C16/06;H01L21/822;H01L21/8247;H01L27/04;H01L27/10;H01L29/78;H01L29/788;H01L29/792 主分类号 G11C17/00
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