| 摘要 |
<p>PURPOSE:To decrease energy consumption to be 1/n by adding a frequency dividing circuit which frequency-divides a reference clock signal, and a circuit to input the reference clock signal to a charge pump circuit in case of a normal operating condition and to input a signal, for which the reference clock signal is frequency-divided into 1/n, in case of a stand-by mode. CONSTITUTION:A switching circuit 2 is composed of frequency-dividing circuits 6, 9 which divide the frequency of an inputted signal into 1/2, an inverter circuit 10, AND circuits 11, 13 and an OR circuit. In the stand-by mode, since a stand-by signal is a high level and a low level is inputted through the inverter circuit 10 to the AND circuit 11, the output of the AND circuit 11 is fixed to the low level. Accordingly, for the output of the AND circuit 13, the signal 12 of 62.5[kHz], for which a reference clock signal 5 is passed through the frequency dividing circuits 6-9 and divided into 1/16, is outputted. Further, since the signal is outputted to the OR circuit 14 as well, the signal of 62.5[kHz] is outputted to an output terminal 15. Thus, the energy consumption can be reduced at the time of the stand-by mode.</p> |
