PROGRAMABLE CLOCK CONVERSION CIRCUITS

摘要

The circuit relates to a programable clock converting circuit which can perform the CPU clock conversion with chip select signal. The converting circuit is composed of the clock converting selection part (20) which controls the high speed or low speed clock input from the clock generation driving chip (10), the first clock generator (30) and the second clock generator (40). The first clock generator supplies the low speed clock and the second clock generator supplies the high speed clock to the clock generation driving chip. The initial signal is applied to the system in the reset circuit (50).