| 摘要 |
<p>A decoding type select logic generating system including means (1, 2, 3) for listing on a group basis input signal names and output destination signal names contained in register transfer descriptions and control codes for commanding execution of the register transfers for each of the same input signal names and same output destination signal names, means (4) for simplifying logics by replacing the control code having the hamming distance of one by a bit meaning "don't care" on the group basis, means (2) for generating AND gates for the control codes and the input signal names in each of the group having the same input signal name and combining the outputs of the AND gates, means (3) for generating AND gates for the control codes in each group having the same output destination signal name and combining the outputs of the AND gates for each of the output destination signal names, and means (5) for combining the outputs of the groups each having the same input signal name and the groups each having the same output destination signal name.</p> |
