| 摘要 |
PURPOSE:To reduce the number of times of memory access and to attain high speed processing by synthesizing an output logic channel number outputted from a temporary storage circuit and a communication data part outputted from a communication data buffer and outputting the result as a logic channel data. CONSTITUTION:A logic channel number form an output communication channel corresponding to the logic channel number of an input communication channel from a processor 90 is stored in an area of a memory 500. Thus, when the logic channel number coincident with a heater part being a collated data for an associate memory 400 while being separated by an input controller 10 is registered in the associate memory 400, an address control output of a corresponding to address is made active, and the logic channel number (revised header part) stored in the same address of a temporary storage circuit 500 is outputted and given to an output controller 30. The output controller 300 reads out communication data stored tentatively from a communication data buffer and outputs them to an output communication channel while synthesizing them. Thus, the memory access number of times is reduced and the processing is quickened.
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