| 摘要 |
A nonvolatile semiconductor memory circuit is provided with a plurality of bit lines and a plurality of word lines. The nonvolatile semiconductor memory cells are located at intersections of the bit lines and word lines and formed by MOS transistors having a floating gate and a control gate therein. A bias circuit supplies a read-out voltage to the control gate of the selected nonvolatile semiconductor memory cell. Sense amplifiers are also included, each having an input which receives read-out data from the selected nonvolatile semiconductor memory cell, and an output which outputs amplified read-out data. A bias circuit is formed by a dummy cell having the same construction as the nonvolatile semiconductor memory cells. A dummy sense amplifier is included having the same construction as the sense amplifiers. A voltage setting circuit is also included, having feedback circuitry connected between the output of the voltage setting circuit and the control gate of the MOS transistor in the dummy cell. Further, in the present invention, depletion-type MOS transistors are used for coupling the gate of the MOS transistor to the bias circuit. |
