| 摘要 |
PURPOSE:To suppress the occurrence of a latch-up phenomenon of an SRAM cell by increasing the distance between a source region of a p-channel transistor and a source region of an n-channel transistor. CONSTITUTION:In a state that a distance value dC between end parts on the side where p<+> type drain regions DP11, DP12 of active regions A111, A112 on an n-type well and n<+> type drain regions Dn1, Dn2 of active regions A21, A22 on a p-type substrate is kept at a conventional value, the active regions A111, A112 are bent at the drain parts DP11, DP12 by a required size in such a way that they are approached to a VCC wiring part. By this setup, a distance value dD between p<+> type source regions SP11 and SP12 on which a VCC potential of a p-channel transistors PT11 and PT12 constituting inverters INV1 and INV2 is impressed and n<+> type source regions Sn1 and Sn2 on which a VSS potential of n-channel transistors NT1 and NT2 is impressed becomes longer than the distance value dC in a conventional structure; accordingly, a latch-up phenomenon to be caused between a p-channel region and and n-channel region can be suppressed. |
