| 摘要 |
<p>A bipolar RAM (50) having improved read and write cycle times. During a write operation, the state of a selected memory cell (76) is sensed by read/write current controller circuits (90 and 91). A high write current is selected if the data to be written requires a shift of the memory state of the memory cell (76), and a low write current is selected if the data to be written corresponds to the present memory state of the memory cell (76). This improves the write cycle time by reducing saturation of the memory cell (76). If a long write signal is impressed on the RAM (50), the read/write current controller circuit (90 and 91) terminates the high level write current after the memory cell (76) has shifted its memory state. When a memory cell is being selected for a read or write operation, the write current select circuit (142) discharges the bit line attached to the low voltage side of the selected memory cell, improving the read cycle time.</p> |
