TELEVISION RECEIVER WITH TELETEXT DECODER

摘要

PURPOSE: To supply respective character pixel codes in cycles depending on the ordinal number of a series of m1 character pixel codes without providing an extra oscillator of 6MHz by dividing a reference clock pulse train into N groups of reference clock pulses and selecting necessary clock pulses out of the respective groups so that N reference clock pulse cycles match desired width of a character to be displayed. CONSTITUTION: Display clock pulses DCL and a character line signal LOSE are generated by a signal generating circuit 94 as known. This signal generating circuit receives reference clock pulses TR with a rate f0 from a control circuit 95 and a converting circuit generate individual character pixel codes at a speed of 6MHz. To extract desired display clock pulses from the reference clock pulses, the signal generating circuit 94 is equipped with a modulo N counting circuit which receives reference clock pulses of 13.5MHz. Its quantity N is properly selected to match N clock pulse cycles of the reference clock pulses with desired character width of, for example, 1μs.