发明名称 FREQUENCY MODULATION CIRCUIT
摘要 PURPOSE:To obtain a stable operation even in composite modulation and non- modulation by varying the loop gains and time constants of two PLL means connected in series corresponding to the ON/OFF of the input of a modulation signal. CONSTITUTION:A reference signal generating means 10 oscillates a frequency signal which becomes reference, and outputs it to a first PLL means 20. In the case of turning ON the input of the modulation signal 2 for a frequency modulation circuit 100, the loop gain of the means 20 is decreased by a control means 40, and the time constant of a loop filter is increased. Simultaneously, the means 40 increases the loop gain of a second PLL means 30, and decreases the time constant of the loop filter, thereby, runout from a synchronism holding range due to the signal 2 can be prevented from being generated. On the other hand, in the case of turning OFF the input of the signal 2, by performing reverse control as in the case of turning ON the input of the signal 2, stable oscillation output signals can be taken out from the means 20 and 30. In such a way, it is possible to prevent the runout from the synchronism holding range from being generated even in the composite modulation and also, to obtain an output signal with a high C/N in the non-modulation.
申请公布号 JPH01208005(A) 申请公布日期 1989.08.22
申请号 JP19880032264 申请日期 1988.02.15
申请人 FUJITSU LTD 发明人 ITO TAKEO
分类号 H03L7/107;H03C3/00;H03L7/10 主分类号 H03L7/107
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