| 摘要 |
PURPOSE:To prevent step cut of a wiring and degradation of voltage resistance between wiring layers, by performing ion implantation on a surface of an electrode wiring material film, forming a resist pattern thereon, applying an isotropic etching at least at an early stage and forming a pattern of a tapered electrode wiring. CONSTITUTION:A thermal oxide film 5 is formed on a surface of a gate electrode 4 and it is covered with a CVD insulating film 6. Then, a contact hole is formed and a polycide film comprising a laminated films of a polycrystalline silicon film 71 and molybdenum silicide film 72 as a bit line material film. Then, arsenic ions are implanted on the whole surface of the polycide film 7 and a resist pattern 8 is formed. Then, the polycide film 7 is etched away by isotropic etching and the left polycide film 7 is vertically etched away to form a pattern of a bit line. Then, the resist pattern 8 is removed and a thermal oxide film 9 is formed in the vicinity of the polycide film bit line and then, a CVD insulating film 10 is deposited to form an Al word line 11. |
