发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
摘要 PURPOSE:To obtain an embedded collector layer without crystal defects, by providing a vertical hole in a collector lead-out region at the (111) face of an Si substrate, providing a lateral hole from the bottom part of the vertical hole in parallel with the main surface, restricting the holes with an insulating film in a deep groove surrounding an active region, and filling the vertical and lateral holes with conductive poly Si through the insulating film. CONSTITUTION:An N<-> layer 2 on the (111) face of a P-type Si substrate 1 is etched away with SiO2 3, Si3N4 4 and SiO2 5 as the three-layer masks. Double-layer films 6 of SiO2 and Si3N4 are deposited on the side walls of the N<-> layer 2 and isolated with SiO2 7. A deep groove is formed in the isolating film 7 and covered with SiO2 8. Poly Si 9 is embedded, and the surface is oxidized. The double-layer masks 6 are removed. The surface is covered with poly Si 100. The surface is flattened with resist films 11 and 12. Thereafter, etching is sequentially performed. With the SiO2 5 as a mask, B ions are implanted in the poly Si 100. The mask 5 is removed. A base lead-out electrode 10 is formed. A P<+> outer base 131 is formed by heat treatment. The surface is covered with SiO2 14. The mask 4 is removed, and a P-intrinsic base 13 is formed by ion implantation. A vertical hole is provided in the substrate 1. A lateral hole is formed by etching in the direction of <01-1>. The holes are filled with P added poly Si 15. Thus the collector lead-out electrode 15 is formed.
申请公布号 JPH01189154(A) 申请公布日期 1989.07.28
申请号 JP19880012518 申请日期 1988.01.25
申请人 HITACHI LTD 发明人 HORIUCHI KATSUTADA
分类号 H01L29/73;H01L21/331;H01L21/8222;H01L21/8229;H01L27/06;H01L27/10;H01L27/102;H01L29/72;H01L29/732 主分类号 H01L29/73
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