| 摘要 |
A parallel (flashed) type analog-to-digital converter is provided which is fabricated on a single integrated-circuit chip. An input analog voltage is compared with respective reference voltages by a number of comparators. A change position of an output pattern (for example, a thermometer format signal) of the comparators is detected by a number of exclusive OR circuits. The exclusive OR circuits are grouped into several groups, and in each group, the output transistors of respective exclusive OR circuits are connected to separate bit lines. Several sets of separate bit lines are connected to one set of output bit lines through emitter followers or diodes so that parasitic capacitances related to the output transistors are reduced.
|
