发明名称 BOOST SIGNAL GENERATOR
摘要 PURPOSE:To prevent potential decrease, to avoid malfunction at noise production of ground noise and to improve noise margin by using the 1st, 2nd and 3rd MOS transistors(TRs) for a reset circuit, and providing a potential decrease preventing function. CONSTITUTION:A reset circuit 60 acts like bringing a boost signal P2 to a ground potential VSS level at reset and preventing the reduction of VCC+Vth of the signal P2 at production of ground noise in the operation. That is, since a reset signal R at resetting is at a power source potential VCC level, the signal P2 is discharged to the potential VSS via NMOS61, 62 in the on-state. When the signal P2 starts discharging, the NMOS 63 is turned on and a node N11 is charged, the discharge of the signal P2 is going to be suppressed at resetting, but the conductance gm3 of the NMOS 63 is selected sufficiently smaller than the conductance gm2 of the NMOS62, then the signal P2 is reset to the potential VSS level.
申请公布号 JPH01177714(A) 申请公布日期 1989.07.14
申请号 JP19880001977 申请日期 1988.01.08
申请人 OKI ELECTRIC IND CO LTD 发明人 TANAKA TAKAYUKI
分类号 G11C11/407;G11C11/34;H03K17/06;H03K19/096 主分类号 G11C11/407
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