发明名称 FULL ADDER CIRCUIT
摘要 PURPOSE:To improve the characteristics of a full adder circuit by using a multi- level arithmetic circuit which is driven by a current to ensure the combination between the high-speed property and the current control characteristics of a superconducting element. CONSTITUTION:The partial sum producing circuits 71 and 72 consist of a 1st superconducting element 36 and a 2nd and a 3rd superconducting elements 37 and 38 which are set in parallel with the element 36 and at the positions where the currents flow adversely to each other against a control current line. While the carry producing circuits 73 and 74 consist of a 4th superconducting elements 42 and 43 set at the positions where the magnetic connection is secured to the control current lines 44-46. Then the positive/negative partial sums and the output current signals of carries are supplied to the control current line of the next stage. Thus the arithmetic speed is extremely improved together with the extreme reduction of power consumption.
申请公布号 JPH01173130(A) 申请公布日期 1989.07.07
申请号 JP19870332017 申请日期 1987.12.28
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMADA HARUYASU
分类号 G06F7/48;G06F7/49;G06F7/50;G06F7/501;G06F7/503;G06F7/508;H03K19/195;H03K19/20 主分类号 G06F7/48
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