发明名称 PARITY CHECK SYSTEM FOR ADDRESS AND DATA
摘要 PURPOSE:To extend the parity check function without increasing the capacity of the storage, by setting data and the address as one code string and by adding a parity bit to it. CONSTITUTION:Data D0-D7 and addresses A0-A15 are regarded as one code string, and a parity bit is generated and added in accordance with the total of ''1''s in this 24-bit code string. The data part and the parity bit are stored in the address of the storage device designated by the address of this code string. At the read time, error detection is performed by parity check. Thus, parity check for data and addresses is executed at a time, and the capacity of the storage device becomes small because only one bit is used as the parity bit.
申请公布号 JPS56153453(A) 申请公布日期 1981.11.27
申请号 JP19800056809 申请日期 1980.04.28
申请人 FUJITSU LTD 发明人 KUBOTA SHINICHI;SATOU AKIRA;MIYAMOTO TOSHIHIRO;MURATAKA HISAO
分类号 G06F11/10 主分类号 G06F11/10
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