| 摘要 |
PURPOSE:To reduce power consumption by providing a CMOS inverter in which respective gate of a P-channel transistor and an N channel transistor is connected to an input terminal commonly and respective drain is connected to an output terminal commonly, and transistors connected between the source of the P-channel transistor and a power source and between the source of the N-channel transistor and the ground, respectively. CONSTITUTION:When the voltage of the input terminal 2 increases gradually and it goes over the threshold value of the Nch-transistor 1 and less than that of the Pch-transistor 4, both the Pch-transistor and the Nch-transistor are energized, and a through current flows, however, the through current at this time is limited by the Pch-transistor 6 provided between the Pch-transistor 1 and the power source and operated as high resistance or a micro current source and the Nch-transistor 7 provided between the Nch-transistor 4 and the ground and operated as the high resistance or the micro current source. In such a way, it is possible to reduce the through current that flows at every switching of the CMOS inverter. |
