发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To contrive the improvement of refresh characteristics and a speedup by a method wherein the semiconductor region on one side of a MISFET for memory cell selection is formed by an implantation of low-impurity concentration ions as compared to that of the MISFET of a peripheral circuit and the other semiconductor region is formed by an implantation of low-impurity concentration ions and a high-impurity concentration thermal diffusion. CONSTITUTION:A MISFET QS for memory cell selection of a dynamic RAM is constituted of a well region 2, a gate insulating film 10, a gate electrode 11 and semiconductor regions 13 and so on. The region 13 connected to a semiconductor region 6, which is an electrode of a capacitor element C for information storage, out of the regions 13 is formed by an implantation of low- concentration ions as compared to that of a MISFET of a peripheral circuit. The region 13 on a side being connected to an intermediate conducting layer 17 is formed by a high-impurity concentration thermal diffusion from the layer 17 in addition to an implantation of low-impurity concentration ions, thereby a semiconductor region 17A is formed. Thus, a crystal defect is never generated, the refresh characteristics of a device are improved and the operation of the device is speeded up.
申请公布号 JPH01130559(A) 申请公布日期 1989.05.23
申请号 JP19870290111 申请日期 1987.11.16
申请人 HITACHI LTD 发明人 TSUCHIYA OSAMU
分类号 H01L27/10;H01L21/336;H01L21/8242;H01L27/105;H01L27/108;H01L29/78 主分类号 H01L27/10
代理机构 代理人
主权项
地址