Method of and circuitry for generating staggered restore timing signals in block partitioned DRAM

摘要

A memory cell array is divided into four blocks. A sense amplifier and a restore circuit and provided in each of the blocks. The sense amplifier operates by a sense amplifier driving signal and the restore circuit operates by a restore circuit driving signal. A driving signal generating circuit generates two restore circuit driving signals at different timing. In order to generate the restore circuit driving signals, a block selecting signal, a block non-selecting signal, a sense amplifier driving signal and two dummy bit lines are used. Restoring operation in a block selected by the block selecting signal and restoring operation in a non-selected block are performed at different timing by the above described restore circuit driving signals.