| 摘要 |
PURPOSE: A contact formation method is provided to prevent a short due to mis align and overlay between a storage electrode and a lower pattern by using a line/space mask instead of conventional contact mask. CONSTITUTION: A plurality of lower patterns, such as a first interlayer dielectric, polysilicon plugs and a bit line are sequentially formed on a semiconductor substrate. A nitride spacer is formed at both sides of the bit line, and a second interlayer dielectric is formed on the bit line. Using the nitride spacer having a high etching selectivity as an etching stopper, the short between the lower patterns is prevented. Then, a storage electrode contact is formed by using a line/space mask having 1 pitch size of a gate. Thereby, the mis align between the storage electrode contact and the lower patterns is easily removed.
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