| 摘要 |
A video processor operating at camera frame rates is interposed between a camera and a vision system to enhance the signal for improved vision analysis, but always being transparent to the system. Alternatively, in some cases, the processor can be functionally tailored to perform the functions of and replace the vision system. The processor has a reconfigurable architecture to perform a different function in each video frame period, although it repetitively performs the same function on all the image pixels at clock rates within a frame period. The configuration of the processor is determined for each frame period by microinstructions embodied in a lookup table. Macroinstructions in another lookup table address the appropriate microinstruction set for a desired processor function.
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