发明名称 CMOS OUTPUT BUFFER CIRCUIT
摘要 PURPOSE:To decrease the number of necessary transistors by controlling the two transistors of a last stage output circuit with an inverter to which the potentials of a transferring gate and an input terminal controlled with the potential of a control terminal are inputted. CONSTITUTION:When a control terminal C is an L level, the output of the inverter composed of transistors Tr 7 and 8 becomes an H level, and both Tr 3 and 6 are turned on. Consequently, the H level and the L level are respectively supplied to Tr 9 and 10 of the last stage output circuit, both the Tr 9 and 10 are turned off, and an output terminal OUT becomes a high impedance state. On the other hand, when the terminal C is the H level, reversely, the Tr 3 and 6 are turned off, and when an input terminal IN is the L level, the output of the inverter composed of Tr 4 and 5 becomes the H level, the Tr 10 is turned on, and the terminal OUT becomes the L level. Further, when the terminal IN is the H level, the output of the inverter composed of Tr 1 and 2 becomes the L level, the Tr 9 is turned on, and the terminal OUT becomes the H level.
申请公布号 JPH01115217(A) 申请公布日期 1989.05.08
申请号 JP19870273898 申请日期 1987.10.28
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 TOZAWA KAZUO
分类号 H01L21/8238;H01L27/092;H03K19/0175;H03K19/094 主分类号 H01L21/8238
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