| 摘要 |
PURPOSE:To enable high density integration without forming a gap in the direction of a gate line, by forming a level difference, via an insulating film, at the end-portions of floating gates adjacent to each other under a control gate line. CONSTITUTION:A level difference is arranged at the end-portions of floating gates 4a, 4b which are adjacent to each other under a control gate 5 in the AA direction. The AA direction is the columnar direction of memory transistors and coincides with the direction of a control gate line. The end-portion of the floating gate 4b is formed on the end-portion of the floating gate 4a, via a gate insulating film 14. Therefore the gap between the floating gates 4a, 4b in the AA direction does not generate at all. As a result, the gap between the floating gates 4a, 4b can be omitted, so that the high density integration of memory trasistors is facilitated as compared with conventional EPROM. |
