发明名称 DELAY CIRCUIT
摘要 PURPOSE:To generate a delay signal similar to that by other circuit on the same semiconductor substrate by increasing number of inverter stages connected in series through the nonconduction processing of the internal wire so as to increase the delay time. CONSTITUTION:With connection noes N1, N2 connected together, no signal delay is caused between inverters 1 and 4. In cutting off the wire 7 between the connection nodes N1 and N2 externally by a laser beam, since inverters 1, 2, 3 and 4 are connected in series, the delay time due to the increase in the number of inverter stages is increased. When the operation speed of other circuits formed on one and same semiconductor substrate is changed due to fluctuation of the current drive capability of a transistor, the delay time due to the increased number of inverter stages is increased similarly. Then a node is provided between the inverters 2 and 3 and the circuit connecting two inverters 2 in series is increased similarly by one stage.
申请公布号 JPH01109918(A) 申请公布日期 1989.04.26
申请号 JP19870268480 申请日期 1987.10.23
申请人 NEC CORP 发明人 KUWABARA SUMIO;OGAWA SUMIO
分类号 H03K5/13;H03K5/133 主分类号 H03K5/13
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