| 摘要 |
PURPOSE:To efficiently execute a pipeline processing by providing a processing arbitration circuit, and performing arbitration so that contention of processings can be prevented from occurring for plural processing requests for a single function part generated asynchronously and in parallel for data to be transmitted on a data transmission path. CONSTITUTION:The processing arbitration circuit 2 receives the processing request for a function part 3 by request signals 251A, 251B, 252A, and 252B from pipeline stages 11A and 12A, and 11B and 12B. At this time, when no processing is performed at the function part 3 by an execution signal 261 from the function part 3, the execution of the processing at the function part 3 is permitted to either pipeline stages 11A, 12A, 11B, or 12B by permission signals 241A, 241B, 242A, and 242B. When the processing is performed at the function part 3, no execution at the function part 3 is permitted to any of the pipeline stages until the processing is completed. In such a way, the arbitration is performed so as to execute the order of competitive processings in sequence of the processing from which the processing request is issued earlier or in desig nated sequence. |
