| 摘要 |
PURPOSE:To simplify a circuit constitution and to completely exhibit a high speed performance by providing a switching circuit for switching the signal generation of an internal timing and the input of an external timing signal in a timing circuit in an IC. CONSTITUTION:When the control terminal CONT of the switching circuit SW goes to a L level, the timing circuit takes a synchronization by itself irrespective of an external synchronizing input terminal EX and generates the load signal of the cycle of four clocks as the internal timing signal. When the terminal CONT goes to a H level, a feedback from a FF2 to a FF1 is not produced but the external timing signal from the terminal EX is supplied to the input terminal D1 of the FF1. Accordingly, the external timing signal is synchronized with a clock signal again by the FF1. The load signal LOAD is formed from the outputs Q1 and Q2 of the FF1 and the FF2. According to this constitution, a reset signal is externally and easily supplied to the timing circuit without using a complicated circuit such as a FF having a reset function. |
