发明名称 DMA CONTROL CIRCUIT
摘要 PURPOSE:To operate a write inhibition without fail by detecting the overlap of a gate driving signal to gate an access signal and inhibiting a writing to a main storage when the overlap is recognized. CONSTITUTION:Concerning the writing from I/O devices 1 and 2 to a main storage 3, the gate driving signal to gate the access signal is inputted to respectively applicable overlapping detecting circuits 41 and 42, and the overlap is detected by the overlapping detecting circuits 41 and 42. When the overlap of either data on a data signal line or an address on an address signal line is detected, the sending of a writing signal from a main memory writing control circuit 5 for executing a writing control to the main storage 3 is inhibited, and an erroneous writing is prevented. Thus, the erroneous writing to the main memory device due to the trouble of hardware, etc., can be inhibited, and the runaway of a program can be prevented beforehand.
申请公布号 JPH0199152(A) 申请公布日期 1989.04.18
申请号 JP19870257839 申请日期 1987.10.13
申请人 NEC CORP 发明人 TOMIOKA MASAMI
分类号 G06F13/28 主分类号 G06F13/28
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