| 摘要 |
PURPOSE:To enable to manufacture by self-alignment system by relaxing short channel effect by a method wherein a source and drain having a shallow junction is provided in an MOS-FET. CONSTITUTION:A PSG film 11 is adhered on an insulation plate 10 by chemical vapor growing method, a polycrystalline Si film is adhered on the upper surface thereof, a gate electrode 12 is patterned, and thereafter an SiO2 film 13 is producted by thermal oxidation treatment. This SiO2 film 13 is a gate insulation film. Next, the second polycrystalline Si film 20 is adhered on the upper surface thereof and patterned, and further the second SiO2 film 17 is produced on the surface thereof. After the second polycrystalline Si film 20 is changed into an Si crystal film 20' by the irradiation of argon laser, it is changed into a P type layer by ion implantation of boron. After forming two windows through the SiO2 film 17, the second PSG film 18 is adhered over the entire surface by CVD method. Then, phosphorus is diffused from up and down PSG film 11 and 18 into the P type Si crystal film 20' by heat treatment, and accordingly the N type source region 15 and drain region 16 are formed. The P type Si crystal film 20' turns a channel region 14. A window is opened through the PSG film 18, and then an Al electrode 19 is formed. |
