| 摘要 |
<p>A speech synthesis device includes a memory for storing speech information at a plurality of memory locations with each location commencing at a respective leading address, and a table of leading addresses is maintained in the memory. At the beginning of operation, the leading addresses are read from the table and stored in a random access memory so that the leading addresses can be selectively accessed by keyed in information. Address generation circuitry will then successively address the data in each information area of memory in reponse to a particular accessed leading address.</p> |
