| 摘要 |
PURPOSE:To prevent an erroneous operation due to a signal delaying time difference caused by the difference of parasitic capacities from occurring by providing an electrode layer for regulating a capacity in a semiconductor integrated circuit. CONSTITUTION:An electrode layer 4 for regulating a capacity is provided on the periphery of a semiconductor integrated circuit block 2. The block having a desired quality is selected from a semiconductor integrated circuit block 2 on a wafer 1, and mutual wirings 5a are connected to pads 3a. Necessary number of electrode layers 4 are so connected as to supplement the insufficient amount of a parasitic capacity presumed from the length of the wirings 5a. This connection is conducted by forming in advance a contact hole 13 at a position corresponding to the crossing point of the wirings 5a and a predetermined electrode layer 4 in an interlayer insulating layer formed on the block 2 and the layer 4 and then forming mutual wirings 5a. Thus, the regulation of the capacity of the wirings 5a is mainly executed for the signal line in which its delaying time becomes a problem. |
