| 摘要 |
In a stepped square QAM demodulator, each of the I- and Q-channel demodulated analog signals is supplied to an AGC and/or dc offset controller (2) and converted to an N-bit digital signal by comparison with prescribed decision thresholds (4). The digital signals of outermost signal points in the stepped square phasor diagram of the SS-QAM system are converted to digital signals of signal points which form corner portions of a true square phasor diagram and the digital signals of inner signal points of the stepped square phasor diagram are converted to digital signals of corresponding signal points in the true square phasor diagram. An M-bit main data signal is derived from all of the converted digital signals (where M is smaller than N) and an auxiliary data signal (D2) is generated representing whether the M-bit main data signal represents the digital signals of the inner or outermost signal points. A first error signal (E1) representative of an error component of the M-bit main data signal and a second error signal (E2) representative of an error component of the auxiliary data signal are generated and selectively applied to a control signal generator (3) in response to the auxiliary data signal together with the main data signal (D1) to generate a control signal for application to the AGC and/or dc offset controller. |
