发明名称
摘要 PURPOSE:To perform data transfer control which is small in CPU overhead, by providing a data transfer control pointer and controlling the reference and updating of the displays of CPU and ADP by independently accessing the pointer from the CPU and ADP. CONSTITUTION:A CPU sets a pointer 12 to ''0'' at the beginning of the processing. When, for example, I/O transfer of data 13 is performed, the pointer 12 is updated to ''1'' by the number of blocks to be transferred. A channel device CHU continues the checking on the value of the pointer 12 until the CPU updates the pointer 12, and, when the pointer 12 is updated, the CHU transfers the data 13 by one block to an opponent system through the ADP. When the transfer is terminated, the CHU resets the ''1'' of one bit in the pointer 12 to ''0''. After the pointer 12 is reset, the CHU repeatedly performs the Read/Write and pointer resetting and transfers data until all the contents of each bit of the pointer 12 are reset to ''0''.
申请公布号 JPH0115904(B2) 申请公布日期 1989.03.22
申请号 JP19820171542 申请日期 1982.09.30
申请人 FUJITSU LTD 发明人 OOWAKI TAKASHI;FUJIMURA KYOTAKA;KUSANAGI JUNICHI
分类号 G06F13/00;G06F13/10;G06F13/12;G06F13/28 主分类号 G06F13/00
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