| 摘要 |
PURPOSE:To efficiently perform communication and control between a memory and an FPU by simultaneously supplying an instruction signal, which includes the address code of data and an instruction code to the FPU, to the memory and the FPU with one access operation. CONSTITUTION:A first instruction signal is transferred from a CPU 1, and first data to be operated is not only outputted to a bus line 3 from a memory 4 but also written in an FPU 5. A second instruction signal including the address of another data and the arithmetic instruction to the FPU is transferred from a CPU 2, and second data to be operated is outputted from the memory 4 and the arithmetic instruction is executed in the FPU 5. The arithmetic result is latched in the output register of the FPU 5 and is transferred to the memory 4. |
