发明名称 OUTPUT BUFFER CIRCUIT
摘要 PURPOSE:To reduce the peak value of a discharge current flowing from an output terminal to a ground point and a charging current flowing from a power supply to an output terminal and a through-current by supplying power through, a delay circuit and a depletion transistor(TR). CONSTITUTION:When an input signal to an input terminal 1 changes from a low to a high level, the output of an inverter 4 changes from a low to a from level with a delay. Thus, the gate potential of the depletion TR Q4 is not changed from the low level even when the input signal changes from the low level to the high level and a channel resistor is large, then the through- current and the peak value of the discharge current flowing momentarily from the output terminal 2 to a ground point are reduced. When the input signal to the input terminal 1 changes from the high to the low level, the gate potential of the depletion P-channel MOS TP Q3 is not changed from the high level and the channel resistance is large, then the through-current and the peak value of the charging current flowing momentarily from the power terminal to the output terminal 2 are reduced.
申请公布号 JPS6469119(A) 申请公布日期 1989.03.15
申请号 JP19870227601 申请日期 1987.09.10
申请人 NEC CORP 发明人 KATO MASAJI;OUCHI MASAHIRO;SUGIYAMA NOBUYUKI;TANAKA TOSHIAKI
分类号 H03K17/16;H03K19/00;H03K19/0175;H03K19/0948 主分类号 H03K17/16
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