发明名称 LEVEL PROCESSING INFORMATION PROCESSOR
摘要 PURPOSE:To generate software which performs more flexible processing, by recording the address of an instruction executed just before an interrupt in a recording means of the address preceding the interrupt at the time of transfer of processing to a higher priority level. CONSTITUTION:When an interrupt is accepted during the processing in a certain level and the processing in a higher priority level is started, two-fold value of one of old instruction length code holding registers (OLD ILCR) 53 and 54 corresponding to the interrupt classification indicated by an interrupt classification holding register 47 are subtracted from the value of one of old address holding registers (OLDIAR) 1-4 corresponding to the interrupt level indicated by an old level holding register 33 to obtain the address of the instruction executed just before the interrupt in the interrupted level after the start of the processing in the higher priority level. Thus, the address of the instruction just before the interrupt is calculated even in case of the interrupt due to a level other than the highest level, and software is easily generated and maintained, and the flexible processing is possible.
申请公布号 JPS6468838(A) 申请公布日期 1989.03.14
申请号 JP19870227280 申请日期 1987.09.10
申请人 HITACHI LTD 发明人 OZAKI SEIICHI;WADA KENICHI;MORIMOTO SHIGEKI
分类号 G06F9/38;G06F9/46;G06F9/48 主分类号 G06F9/38
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