发明名称 Vertical transistor structure
摘要 Vertical transistor structure with an epitaxially applied layer of the second conduction type on a semiconductor substrate of the first conduction type, in which a tray is formed by insulating walls of the first conduction type extending into the semiconductor substrate. A first highly doped buried layer of the second conduction type in which a second buried layer of the first conduction type extending into the epitaxial layer of the first conduction type is embedded insulated from the semiconductor substrate. Three doped zones of which one, of the second conduction type, is provided for the base terminal and one of the first conduction type for the emitter and collector terminal, and a zone connecting the collector terminal zone and the second buried layer, of the first conduction type, where these regions form the collector. The emitter zone and the collector terminal zone are arranged above opposite end regions of the second buried layer.
申请公布号 US4811071(A) 申请公布日期 1989.03.07
申请号 US19870096218 申请日期 1987.09.08
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 ROLOFF, HERBERT F.
分类号 H01L29/73;H01L21/331;H01L21/74;H01L21/761;H01L29/08;H01L29/732;(IPC1-7):H01L29/72 主分类号 H01L29/73
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